Job overview This role involves defining organization-wide formal verification methodologies, influencing architecture decisions for verification efficiency, leading complex debug efforts, and mentoring engineers at all levels. The Staff Engineer is responsible for aligning formal verification practices with business objectives and technological advances. Beyond the technical work, you will have line management responsibilities and middle management involvement – where you would lead project delivery and development of individuals in your team. Responsibilities: Lead formal verification strategy across multiple projects, aligning methodologies with architectural and business goals. Architect scalable formal frameworks and reusable verification IP to enable efficient, high-quality verification at scale. Lead complex formal analysis to ensure exhaustive coverage of critical properties, safety requirements, and corner cases. Own resolution of the most challenging verification issues, providing deep technical guidance across design and verification teams. Oversee equivalence checking, verification planning, and coverage closure for large or high-risk designs. Mentor engineers and champion best practices, while advancing verification flows, automation, and tool adoption across the organisation. Requirements: Education Bachelors/Masters/Doctorate in EEE/ECE/CS/Maths/Physics Technical Skills: Linux/Unix Verilog/ SystemVerilog /VHDL Digital design Open-source projects in design/verification RISC-V/Arm/x86/MIPS SVA/PSL/Theorem proving Tcl/Python/Bash Soft Skills Problem solving Ownership Autonomy Team spirit Attention to details Language skills : English Experience : 9-12 years of relevant design/verification experience 11 - 14 years of non-design/verification experience >4 years of FV experience at least 1 project experience where autonomously run large scale projects (>6 months) Right to work : We provide sponsorship for exceptional candidates, upon conditional terms and conditions. In Return: You’ll apply your formal verification expertise to technologies that shape and support millions of devices for years to come. This role gives you the opportunity to step into a field where you can grow your technical leadership and impact. About us Axiomise is the world’s only formal verification (FV) training, consulting, services and custom solutions company. The grand mission of Axiomise is to make the use of formal methods both accessible and predictable, such that every electronic chip on the planet (and there is almost one everywhere you see) can be proven to be bug-free using the power of formal verification. Mindset At Axiomise, our vision is to “make formal normal”. We achieve this by embracing within Axiomise a culture that thrives on A spiration, e X cellence, I nclusion, O neness and M astery. Join us in our shared passion to make formal normal. Equal opportunities at Axiomise Axiomise is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, colour, religion, sex, sexual orientation, gender identity, national origin, disability, or status.