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Senior firmware engineer

Livingston
Advanced Resource Managers
Firmware engineer
Posted: 10 November
Offer description

Senior/Principal Firmware (FPGA) Engineer

Location: Edinburgh – 100% Onsite

Rate: £75 P/hr


Security Requirements:

* This project is classified as UK Eyes Only, meaning the candidate must be eligible to obtain the highest level of UK security clearance.


Must Have

* Considerable experience designing Firmware architecture using FPGA technologies and tools from either Xilinx, Intel (Altera) or Microsemi (Actel).
* Experience with fast interfaces such as PCIe, Ethernet, JESDC.
* Proficiency in advanced verification techniques such as VHDL or System Verilog / UVM.
* Familiarity with Model-Based Engineering using MATLAB and Simulink tools is advantageous.
* Strong capability in analysing system-level requirements to derive detailed Firmware requirements.
* A methodical approach to the full firmware design lifecycle, ideally following structured processes such as RTCA DO-254 or similar.


Key Responsibility Areas

Our Electronics Function in Edinburgh requires a Senior/Principal Firmware (FPGA) Engineer to create and develop firmware for leading-edge airborne applications. You will be responsible for:

* Designing and developing Firmware designs using VHDL.
* Verifying designs using either VHDL or SystemVerilog.
* Working to a structured firmware design process.


Skills, Qualifications & Knowledge Required

* Degree in Electronics and Electrical Engineering, ideally specialising in FPGA / Digital techniques.
* Proven experience in:
* Creating innovative VHDL-based FPGA designs.
* Advanced verification techniques using VHDL or SystemVerilog / UVM.
* FPGA technologies from Xilinx, Altera, or Microsemi and associated tools.
* Model Driven Engineering tools, including MATLAB and Simulink.
* High-Speed Interface Design & Integration (PCIe, DDR3, Ethernet).
* Analysing system-level documents and deriving detailed Firmware requirements.
* Applying structured firmware processes such as RTCA DO-254 or equivalent.
* Specifying complex timing and area constraints for efficient FPGA place and route.
* Debugging firmware designs and supporting system-level verification and integration.

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