Job Overview
Our Solution Engineering division develops and verifies IPs for a variety of SoC projects, integrating both internally developed builds and third‑party IP. We are looking for a creative and motivated Senior Verification Engineer to verify RTL implementing new features in Arm‑based SoCs, ensuring both new and existing functionality meets architectural and quality requirements.
Responsibilities
* Collaborate closely with RTL designers and architects to understand specifications and microarchitecture details.
* Develop new validation setups and work to improve existing environments, including stimulus generation, checking, and coverage infrastructure.
* Develop and complete verification plans and test plans.
* Implement verification strategies in partnership with other verification engineers.
* Drive functional and code coverage closure.
* Debug and resolve sophisticated design and verification issues.
* Contribute to continuous improvement of verification methodologies, infrastructure, and protocols.
* Provide technical mentorship and support to less experienced engineers.
Required Skills and Experience
* 5+ years of experience in IP, subsystem, or SoC verification.
* Strong proficiency in SystemVerilog and Verilog.
* Experience with UVM or other industry‑standard verification methodologies.
* Experience developing constrained‑random verification environments and reusable verification components.
* Experience developing verification strategies and test protocols.
* Understanding of SoC verification, including verification flows that incorporate software elements.
* Experience with scripting languages such as Python, Perl, or similar.
* Strong debugging, analytical, and problem‑solving skills.
* Strong interpersonal and communication skills, with the ability to collaborate effectively across geographically distributed teams.
Nice‑to‑Have Skills and Experience
* Experience with Arm‑based designs and/or Arm system architectures.
* Experience with AMBA protocols such as CHI, AXI, AHB, and APB.
* Experience with JTAG, SWD, or TAP‑based debug infrastructures.
* Experience with clock domain crossing (CDC), reset domain crossing (RDC), and power‑aware verification.
* Exposure to low‑power design techniques and UPF/CPF methodologies.
* Experience with DFT concepts, including scan and MBIST.
Equal Opportunities
Arm is an equal‑opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
Hybrid Working
Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We empower groups and teams to determine their own hybrid working patterns, depending on the work and the team’s needs.
Salary
£73,500 - £99,500 per year
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