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Digital design engineer

Reading (Berkshire)
European Tech Recruit
Digital design engineer
Posted: 3h ago
Offer description

Digital Design Engineer


European Tech Recruit are working closely with a leading semiconductor company, based in Reading, who are looking for a talented Digital Design Engineer to join their team.


This role can also be available working out of their Lausanne (Switzerland), Northampton (UK) or Dortmund (Germany) offices.


Responsibilities as Digital Design Engineer:

* Define block- and top-level specifications for high-speed digital circuits that meet performance targets based on system-level requirements.
* Review and challenge architectural specifications to ensure robustness and efficiency.
* Specify analog/digital interfaces in close collaboration with analog and mixed-signal design teams.
* Design, implement, and test RTL code.
* Collaborate closely with verification and physical-implementation engineers to ensure functionality, timing, area, and power goals are met.
* Support post-silicon activities, including lab bring-up, debugging, characterization, and productization.
* Manage workload and schedules, providing regular updates to internal teams and external stakeholders.


Requirements:

* Master’s degree in Electrical or Electronics Engineering (or equivalent/higher qualification).
* 5+ years of experience in the semiconductor industry.
* Strong technical background in designing high-speed digital circuits using advanced CMOS technologies.
* Exposure to analog-design techniques (a plus).
* Familiarity with industry-standard EDA tools (e.g., Cadence) is beneficial.
* Hands-on design experience in PHY design for high-speed interfaces (e.g., USB4, PCIe) preferred.
* Proficient RTL coding skills (SystemVerilog preferred).
* Advanced knowledge of high-speed and low-power digital design techniques.
* Familiarity with signal-processing techniques (a plus).
* Proficiency in scripting and tool automation (e.g., Python, Tcl).
* Solid understanding of clock-domain crossing (CDC) concepts and mitigation techniques.
* Experience analysing synthesis and static-timing-analysis (STA) results.
* Knowledge of verification methodologies (e.g., UVM) is an advantage.


If this role is of any interest please apply directly on LinkedIn or send a copy of your CV to nh@eu-recruit.com.


By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (https://eu-recruit.com/about-us/privacy-notice/)

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