Principal Design Engineer / Technical Lead
Wales – Commutable from Bristol
Join a pioneering start-up backed by one of the largest EDA companies globally. This is a rare opportunity to help build a digital design team from the ground up, focused on pushing the boundaries in AI, future compute, and compound semiconductors.
As a Principal Design Engineer, you will play a foundational role in shaping the company’s technical direction, development culture, and working methodologies. You’ll lead the architecture and RTL development of advanced compute silicon, working at the forefront of innovation and with top-tier industry partners.
Key Responsibilities:
* Define digital architectures for AI accelerators, data paths, control logic, and SoC subsystems.
* Develop high-quality, synthesizable RTL in Verilog/SystemVerilog with performance, power, and area optimization in mind.
* Collaborate cross-functionally with verification, physical design, and packaging teams to ensure seamless integration.
* Leverage Cadence digital tools for synthesis, STA, and DFT.
* Lead design reviews and help establish design methodologies and best practices.
* Support tape-out and lab-based silicon validation.
* Mentor junior engineers and help grow team capabilities.
Requirements:
* Proven experience in digital IC design with a strong background in AI/ML hardware, compute, or DSP architectures.
* Deep understanding of SoC architecture, PPA trade-offs, and modern design flows.
* Confident user of Cadence tools and design environments.
* Prior experience leading or mentoring engineering teams.
* Must have the right to work in the UK and be available on-site several days per week.
For a confidential discussion, please contact Rachel Mason at IC Resources.