Job Description
Contract Position for a Digital Verification Engineer Cambridge (Remote / Hybrid) Outside IR35
We have an exciting Outside IR35 contract opportunity for an experienced Digital Verification Engineer to join a leading open-source silicon team.
Hourly Rate: Negotiable and dependent on experience (Outside IR35)
Ideally based in Cambridge, with hybrid/onsite presence preferred.
Remote working is available, and candidates anywhere in the EU will be considered, though UK / Cambridge-based engineers are preferred.
You will contribute to production-proven projects including Ibex CPU and OpenTitan, delivering commercial-grade, tapeout-ready silicon alongside world-class partners.
The Role
Apply industrial-strength verification across block- and system-level designs including RISC-V cores, cryptographic IP (OTBN), and key peripherals (USB, I2C, SPI).
Key Responsibilities
* Develop and debug SystemVerilog/UVM testbenches
* Create verification plans, tests, and coverage
* Review contributions and resolve regressions
* Support CI/test infrastructure
* Collaborate with partners through tapeout
Requirements
* 5+ years industry verification experience
* Strong SystemVerilog and UVM
* Full verification lifecycle experience through tapeout
* C and/or Python for automation
* Git/GitHub collaboration
Desirable: Formal verification (Jasper), RISC-V/ISA knowledge, security verification, silicon bring-up, or technical leadership experience.
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