A fantastic opportunity for an experienced Mixed Signal Verification Engineer to join an innovative leader in high-speed and energy-efficient chip-chip link solutions, critical to the evolution of the electronics industry.
Option to work from sites in the UK, Switzerland, UK, Denmark or Germany.
Key Responsibilities
* Verification plan tasks in analog/mixed signal environment related to high speed SerDes designs
* Debug and flag bugs with design team
* Enhance and develop new methodologies with the verification team and EDA vendors
* Document and track verification plan tasks, bug findings and methodology work
You will have
* Good scripting techniques
* Good understanding of fabrication process, process corners, simulation, and verification setup
* Very good knowledge on electrical and discrete test benches / solvers in terms of run time optimization
* Very good knowledge about simulation tools and debugging techniques
* Good understanding of revision control
* Good communication and reporting skills
Experience
* 10 years of experience on digital/mixed signal/analog verification: test bench design, connect modules, design electrical/discrete partitioning, UDN, wreal, compile and elaboration debug
* Experience in behavioral modelling, basic knowledge of analog building blocks
* Experience with simulator: fast analog solver e.g., Cadence APS, SpectreX / digital solver e.g., Cadence Xcelium
* Experience in System Verilog Assertions
* Experience with Cadence Ocean Script
* Experience with Cadence Virtuoso Framework: Schematic editor, Assembler, AMS
* Experience on high-speed communication systems such as SerDes would be a plus
* Good digital verification background with some Specman/SV UVM exposure and/or analog verification background
By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (https://eu-recruit.com/about-us/privacy-notice/).
#J-18808-Ljbffr