Initial 6 month contract, inside IR35.
Would be hybrid!
* Strong RTL design skills using VHDL and Verilog for both design and testbench development.
* Experience integrating ARM Cortex cores, including familiarity with ARM AMBA bus protocols such as AHB and APB.
* Knowledge of low power digital design techniques, including clock gating, power gating, retention
* Experience working with common digital interfaces such as UART, SPI, I²C, etc.
* Hands on experience using simulation tools, preferably QuestaSim/ModelSim.
* Ability to interpret linting reports, CDC checks, and synthesis reports for RTL debug.
* Familiarity with scripting languages like python for automation is a plus.