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Summary:
Come join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development, with a focus on energy-efficient design and innovative technologies that enhance user experience. Our world-class engineering team spans RF/Analog architecture, Systems/PHY/MAC design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you thrive in a fast-paced, challenging environment and enjoy collaboration across functional areas, we encourage you to apply.
We are seeking Physical Layer design engineers to develop advanced signal processing algorithms for Wireless LAN systems. The primary responsibility is the architecture, design, and verification of 802.11ac physical layer algorithms. You will collaborate with protocol, software, and systems teams to develop cutting-edge wireless silicon for Apple products.
Key Qualifications:
* At least 7 years of experience in wireless PHY design engineering
* Strong fixed-point knowledge and experience with bit-true cycle-accurate verification
* Understanding of decoders such as Viterbi, LDPC, Polar
* Knowledge of filter design, multi-radix implementation, and trade-offs
* Familiarity with energy-efficient and low-power logic design, power analysis, and estimation
* Understanding of wireless standards like IEEE 802.11, 802.15, Bluetooth, or 3GPP is a plus
* Background in computer architecture and bus fabric (APB/AHB/AXI)
* Experience with power management across multiple domains
* Proven track record of bringing logic designs into high-volume production
* Excellent communication skills, self-motivated, well-organized
* Experience with FPGA and/or emulation platforms is desirable
* BS degree and 10+ years of relevant industry experience
Description:
Develop signal processing intensive designs for wireless communication SoCs, including:
* Writing specifications and defining microarchitecture based on MATLAB/C system models
* Designing area- and power-efficient, low-latency, scalable, and flexible architectures
* Collaborating with algorithm and software teams to optimize performance and power efficiency
* Designing RTL logic that is power and area efficient, supporting verification
* Using tools to ensure lint-free and CDC/RDC clean designs
* Synthesis and timing constraint management
* Design experience with wireless protocols such as 802.11 a/b/g/n/ac
Additional Requirements:
Apple is an equal opportunity employer committed to inclusion and diversity. We provide equal employment opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple prohibits discrimination or retaliation against applicants discussing compensation or related topics.
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