FPGA Design Engineer | Cambridge | Competitive Salary
As a FPGA Design Engineer, you will be joining a growing business that is investing in its technology and expanding its engineering capability. This is an additional role created to support increased project demand, offering the chance to step into a structured, technically focused environment where precision, analytical thinking and engineering excellence drive every project. This opportunity suits someone who enjoys working methodically, solving complex challenges and contributing to reliable, high performance design solutions.
As a FPGA Design Engineer, you will benefit from:
23 days holiday plus bank holidays
Life assurance
Standard pension scheme
Exposure to advanced Engineering technologies and complex design work
Opportunities for professional development and technical progression
A structured environment that supports focused, independent working
As a FPGA Design Engineer, your responsibilities will include:
Designing, implementing and verifying FPGA modules using SystemVerilog
Applying timing constraints, analysing reports and refining designs accordingly
Working with hardware, software and mechanical teams to deliver integrated solutions
Producing clear technical documentation including module specifications
Conducting code and documentation reviews to maintain high engineering standards
As a FPGA Design Engineer, your experience will include:
Experience within anm industrial evirnoment
Proven FPGA development experience using SystemVerilog
Python based verification, ideally using cocotb
Understanding of timing closure and low power design principles
Confidence using the Linux command line
Experience with version control tools such as Git or SVN
Ability to follow structured engineering processes and coding standards
If you're ready to take the next step in your career within a growing engineering team, we'd love to hear from you. Apply today with an up-to-date CV or call Amber Marshall at Rubicon for more information.
Do you want to keep it as simply £Competitive on the top line, or would you like me to phrase it as a band (for example “up to £X”) to help attract the right level of FPGA Design Engineer?