Meet the Team
Join the Package Design Team at Cisco Silicon One in Armenia, a group leading the way in developing Cisco's groundbreaking silicon solutions for next-generation networking. As a collaborative team at the center of Cisco's silicon development, we design and optimize advanced package solutions for some of the industry’s most sophisticated ASICs. You’ll work directly with experts in layout, signal integrity, and power distribution, shaping innovative methodologies and driving the evolution of high-performance networking technologies.
Your Impact
This role offers a unique opportunity to make a significant impact on the future of networking innovation within the Cisco Silicon One initiative. As a lead engineer, you will drive the entire package design process—from planning and optimization to execution—ensuring the delivery of high-speed, robust, and scalable solutions for global networks. You will mentor engineers, define strategies, and collaborate across multi-functional teams to accelerate the creation of industry-leading silicon packages. Beyond technical leadership, you’ll join a passionate community dedicated to changing how the world connects, works, and learns, while building strong partnerships and fostering collective success.
Responsibilities
* Lead package design tasks, planning and driving schedules from concept through implementation
* Optimize package pinouts, stack-ups, power distribution, and high-speed routing, balancing performance and manufacturability
* Collaborate with silicon floor planning, signal integrity (SI), and power integrity (PI) teams to ensure design quality and efficiency
* Work closely with layout editors to deliver high-quality package designs aligned with interface requirements
* Enhance design methodologies and partner with vendors to improve product quality and efficiency
* Drive innovation in package solutions for Cisco’s next-generation ASICs
Minimum Qualifications
* Bachelor’s degree in Electrical Engineering or a related field
* Experience in ASIC package design, including optimizing pinouts, stack-ups, and high-speed routing
* Familiarity with relevant industry-standard EDA tools for layout and design for chip package development & simulations
* Practical experience in chip packaging processes, including vendor collaboration and management to ensure successful package development
* Strong understanding of high-speed signal design and power distribution networks (PDN)
* Strong analytical and problem-solving skills in debugging and optimizing package designs
Preferred Qualifications
* Master’s degree in Electrical Engineering
* Knowledge of silicon floor planning, signal integrity (SI), and power integrity (PI) considerations
* Proven track record to drive design improvements and lead stakeholder coordination throughout the design process
* Familiarity with advanced testing and measurement equipment, including oscilloscopes and TDR/VNA analyzers
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