Infineon Technologies Bristol is seeking a highly skilled and innovative individual who excels in deciphering complex technical details and devising effective solutions. If you have a passion for working in a dynamic environment and thrive in a multinational setting, this is the opportunity for you Join us and be part of a team that is dedicated to delivering exceptional results in the automotive field. As a Digital Verification Senior Staff Engineer, you will work within the IP Development team in Bristol, a team with a proven track record in successful IP deliveries into the AURIX Automotive Microcontrollers. In your new role you will: Be responsible for developing System Verilog - UVM testbenches and solve potentially complex problems related to test bench development Be responsible for developing right from scratch UVC components for new verification environments; Be responsible for defining and writing a functional coverage model; Debug failing test cases to root cause; Participate in reviews to ensure test bench meets quality and is complete; Contribute to verification perspective in Design and Concept meetings; Ensure test bench meets sign-off targets, including coverage, functional safety and test bench qualification; Proactively help increase efficiency of verification activities and mitigate risks early; Contribute to enhancing Verification strategy and architecture of IP testbenches. Although you are able to develop your tasks independently, you work effectively as part of a team, always being willing to both give and take help when necessary. You are able to communicate clearly, and to explain complex technical matters in a clear manner. Furthermore, you have a proactive personality to mitigate risks early, which allows you to perform your tasks in an independent way. You are best equipped for this task if you have: At least 8 years of experience in Verification working with Verilog and/or SystemVerilog; 5 years of experience on IP/block level Test-bench bring up on SV UVM based platform; The ability to understand complex design specification, derive features and test bench architectures from concept; Familiarity with CAD/EDA tools for Design and Simulation; Working knowledge in scripting languages for verification environments (e.g Python, Perl, TCL would be preferred); Strong background in Digital Logic Design and Verification; Fluency in English. Please send us your CV in English.