Job Description
Digital Design Engineer, RTL, VHDL, Verilog
Rate: £60 per hour
Contract Length: 6 months initially
IR35 Status: Outside IR35
Location: Mostly remote with occasional site visits to Bristol
KO2's client is looking for an experienced Contract Digital Design Engineer to support a key programme of work on a 6-month initial contract. This role offers a competitive £60 per hour rate, sits outside IR35, and requires only occasional on-site presence in Bristol.
Key Skills & Experience Required
Digital / RTL Design
* Strong RTL design experience using VHDL and Verilog, covering both design and testbench development
* Proven experience integrating ARM Cortex cores, with solid knowledge of ARM AMBA bus protocols (AHB, APB)
* Good understanding of low-power digital design techniques, including clock gating, power gating, and retention
* Experience working with common digital interfaces such as UART, SPI, and IC
Verification & Tooling
* Hands-on experience with simulation tools, ideally QuestaSim / ModelSim
* Ability to interpret and debug linting reports, CDC checks, and synthesis reports
* Familiarity with scripting and automation, particularly Python, is highly desirable
This is an excellent opportunity to work with KO2's client on a technically interesting digital design project, offering ...