Job Title: Staff GPU HW Design Engineer
Location:
United Kingdom
Job Type: Permanent Full time
Salary: DOE
Role Overview:
You'll play a crucial role in designing, debugging, and optimising complex hardware modules to achieve superior performance, efficiency, and reliability.
You must be a British Citizen. There is no visa sponsorship available for this role.
Key Responsibilities:
:Collaborate with design, verification, and validation teams to develop advanced silicon solutions.
:Prepare detailed microarchitecture design specifications and execution plans aligned with project goals.
:Perform in:depth analysis and optimization of complex circuits, balancing frequency speed, area, power, and performance.
:Participate in design reviews, providing insightful recommendations for improvement.
:Maintain and enhance the design environment while tracking and resolving design bugs.
:Mentor and support graduate engineers and early:career team members, helping them navigate design challenges and learn industry best practices.
:Foster a culture of learning by contributing to training programs, knowledge:sharing sessions, and technical guidance for junior team members.
:Leverage the latest techniques, tools, and technologies in silicon design.
:Plan, schedule, and complete assigned tasks within deadlines.
:Contribute to open discussions, present technical findings effectively and regularly communicate with cross:functional team members.
Experience Required:
:Minimum of 10 years of industry experience
:Solid knowledge of digital integrated circuit design techniques and methodologies.
:Hands:on experience in RTL design at IP or SoC level using SystemVerilog.
:Proficiency in optimizing circuit designs and balancing key trade:offs for performance metrics.
:Expertise in ASIC or FPGA design tools and environments.
:Exposure to formal proof methodology for capturing design intent.
:Strong analytical skills, responsibility, and problem:solving capabilities.
Desired and further beneficial skills:
:Knowledge of CPU, DSP, or FPU architectures and debugging/testing strategies.
:Hands:on experience with ASIC, FPGA, and physical design tools (P and R).
:Proficiency C, SystemC, C++, Python, Perl, or TCL.
:Knowledge of place and route methodologies.
:Understanding of verification requirements through specification analysis.
:Experience in GPU/CPU design and associated methodologie