Verification Engineering opportunity with a globally prestigious semiconductor company at their HQ in Cambridge, at senior and staff levels of seniority.A Verification Engineer must have:4+ years experience in IP level verificationExcellent command of System VerilogExperience with UVMResponsibilities include:Owning a CPU project and developing it through all stages of the verification processProduction of verification strategies and test plansDetermining causality of problems in the verification processIf you would be interested in this role, email your CV to awarner@eu-recruit.com or apply directly via LinkedInThis role is able to provide visa and relocation support from anywhere in the world Key Words: Verification Engineer / Verification / UVM / SemiconductorBy applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (https://eu-recruit.com/about-us/privacy-notice/)