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At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. We push the limits of innovation to solve the worlds most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. The Networking Technology and Solution IP Group at AMD is adding to the Data Centre design team in Belfast. We focus on design and verification of ASIC blocks for next generation data center networking, focusing on the needs of AI clusters for training and inference; covering the entire design cycle across: architecture, algorithm design and modelling, block specification, RTL design, test planning, verification and end-to-end validation. We encourage each other to work, over time, on all aspects of our development and to have a big picture view of our designs to better guide our block level development.
Becoming a part of our local team at this stage is a hugely exciting opportunity and will enable you to play a key role in solidifying our culture and values as we grow.
For this highly visible role, the ideal candidate will be able to demonstrate success in a comparable technical role on a product team innovating and redefining high-performance computing and networking applications. You are keen to make a real word difference in networking. You want to achieve the best image quality and customer experience, whilst minimising bandwidth, power and chip area. Mentor verification team and provide technical support for verification activities
Contribute to the post-silicon validation of ASICs in the lab, writing tests and scripts
Degree or better in Electronic Engineering, Computer science, or related subject
Experience in C/C++, Python, Perl, TCL for scripting and testbench development
Experience in designing complex digital hardware systems and developing hardware architectures for algorithm implementation would be a plus
Familiarity with best practice chip-level verification techniques and languages
Experience of leveraging AI tools would be an advantage