Key Responsibilities
* Architect and develop scalable, reusable UVM‑based verification environments for high‑speed interface IPs and full SoC‑level integration
* Own IP‑level and SoC‑level verification planning, including coverage strategy, protocol compliance, and corner‑case scenarios
* Develop SystemVerilog/UVM testbenches, sequences, drivers, monitors, scoreboards, and checkers for complex protocol stacks.
* Perform coverage‑driven verification (functional & code coverage) and drive closure at block and full‑chip level
* Execute large‑scale regressions, analyze failures, and perform root‑cause debug across testbench and RTL
* Actively collaborate with design, architecture, and post‑silicon teams to ensure alignment with real‑world use cases
* Contribute to verification methodology standardization, performance optimization, and automation
Mandatory Technical Expertise
* 4+ years of hands‑on ASIC Functional Verification experience
* Strong command of SystemVerilog with UVM / OVM, including Layered testbench architecture Virtual sequences, Register model (RAL), Assertions and checkers.
* Proven experience in SoC‑level verification, including: IP integration, Clock/reset, domain interactions, protocol coherency across blocks
* Solid understanding of AMBA AHB & AXI (AXI4 / AXI‑Lite)
High‑Speed Interface Specialization (Key Differentiator)
Candidates must have direct verification experience in one or more of the following:
* PCIe (Gen3/Gen4 preferred) – LTSSM, link training, error handling
* USB (2.0 / 3.x) – protocol state machines and compliance flow
* Ethernet (1G/10G/25G/40G+)
* MAC layer verification
* FEC (RS‑FEC / BASE‑R FEC)
* SerDes behavior and link stability scenarios
Scripting & Automation
* Perl and/or TCL – Mandatory
* Experience in: Regression automation, Coverage reporting, Log parsing and failure triage
Education Requirement
* Bachelor’s degree in Electrical Engineering, Electronics & Communication, Computer Engineering, or a related field
* Master’s degree in VLSI / Microelectronics / Computer Engineering is a strong advantage
* Equivalent industry experience with proven SoC verification ownership will be considered in lieu of advanced degrees
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