Overview
Sr. System Performance Architect- OS Modelling and Simulation
Location: Cambridge, England, United Kingdom
About the role
You will spearhead advanced system performance modelling and simulation, integrating software and hardware to boost efficiency, identify execution hotspots, evaluate performance metrics, drive software-hardware co-optimization, and utilize tools like gem5 to influence CPU microarchitecture design, enhance product performance, and advance energy efficiency. This role is pivotal in crafting systems that deliver exceptional user experiences and set benchmarks for sustainable excellence.
Responsibilities
* Perform system performance modeling and simulation, ensuring the collaborative optimization of software and hardware.
* Identify program execution hotspots and microarchitecture bottlenecks through top-down analysis of computing load requirements and bottlenecks in key service scenarios, guiding software architecture optimization and hardware acceleration implementation.
* Develop performance models for the software load and hardware/chip architecture of terminal systems, creating evaluation models for user experience performance indicators based on software load and hardware specifications, and supporting chip and product planning performance evaluations.
* Lead the development and maintenance of the gem5 emulator to evaluate and optimize system performance in detail.
* Build benchmarks tailored to terminal software characteristics and guide CPU microarchitecture design, vertically optimizing soft and hard cores to enhance product performance and energy efficiency competitiveness.
Qualifications
* Master#39;s degree or higher in IC, Microelectronics, Computer Science, Communication, or related fields. Relevant experience with practical project work in chip performance modeling, simulation, and collaborative software-hardware optimization.
* Proficiency in system performance modeling and simulation tools (e.g., gem5, QEMU), with the ability to develop and maintain gem5 simulators.
* Deep understanding of the chip design process, with the capability to analyze and optimize chip performance.
* Expertise in software and hardware co-design methodologies to optimize system-level performance.
* Strong knowledge of benchmark construction and microarchitecture design, with the ability to guide CPU microarchitecture optimization.
Seniority level
Mid-Senior level
Employment type
Full-time
Industries
Telecommunications
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