Senior / Staff Formal Verification Engineer - GPU
We are currently partnered with an industry leading semiconductor giant in the UK working at the forefront of GPU innovation. They are looking to expand their team with an experienced Formal Verification Engineer to work on the deployment of advanced formal techniques on next-generation GPU designs.
This is a permanent position based in Cambridge - please note this is a full onsite role.
Key responsibilities for this Senior/Staff Formal Verification Engineer position:
* Define and execute Formal Property Verification (FPV) plans for 3D graphics pipelines and data paths.
* Build assertion-based testbenches and debug RTL to achieve formal sign-off.
* Apply advanced abstraction techniques to resolve proof complexity and state-space explosion.
* Partner with global Architecture and RTL Design teams to influence design-for-verification (DFV) decisions.
* Engage with EDA vendors to explore and implement cutting-edge sign-off methodologies.
Key requirements:
* Mastery of industry-standard formal tools (e.g., JasperGold, VC Formal, or Questa Formal).
* Hands-on expertise writing SystemVerilog Assertions.
* PExperience in deep bug-hunting, coverage closure, and achieving formal sign-off on complex IPs.
* Knowledge of GPU architectures or sequential equivalence checking (C-to-RTL).
Keywords: Formal Verification / FPV / SVA / JasperGold / GPU / RTL Debugging / Formal Sign-off / Abstraction / Semiconductor / Cambridge / 3D Graphics / Model Checking / DV
If you are interested in this Senior/Staff Formal Verification Engineer position, please send a CV to ts@eu-recruit.com
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