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Client:
Cisco
Location:
Reading, United Kingdom
Job Category:
Other
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EU work permit required:
Yes
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Job Reference:
93698a5c9ca5
Job Views:
10
Posted:
25.08.2025
Expiry Date:
09.10.2025
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Job Description:
Acacia, a Cisco company, develops high-speed intelligent transceivers (100G/400G/1T) using advanced signal processing and photonic integration for fiber optic transmission across global networks (data center/metro/long-haul/ultra-long haul).
Key Responsibilities
* Analog/Mixed-Signal IC Design: Architect, design, layout, measure, and productize high-speed (>25Gb/s) ultra-deep submicron CMOS analog circuits.
* Technical Leadership: Lead large block design, mentor colleagues, manage deliverables, and drive robust design methodologies from concept to production.
* Collaboration: Work closely with packaging, hardware, digital/DSP, system, and module teams to ensure integration and signal/power integrity.
* Peer Review & Innovation: Participate in peer reviews, contribute to best practices, and drive continuous improvement.
Who You Are
* Passionate about high-speed AMS circuit design and pushing technological boundaries.
* Highly experienced, detail-oriented, energetic, and solution-driven.
* Self-motivated and collaborative; comfortable with independent and team-based work.
* Strong communicator, open to feedback, and focused on team effectiveness.
Minimum Qualifications
Education & Experience:
* BSEE + 15 years, MS + 10 years, or PhD + 7 years (or equivalent)
Expertise in at least 3 of:
* Voltage regulators
* High-performance PLLs
* Opamps and programmable gain amplifiers
Preferred Qualifications
* Experience with electrical transceiver applications (backplane/cable comms)
* FinFET process experience
* Floor planning and custom transistor layout
* High-frequency layout (inductors, transformers, transmission lines)
* Design for Manufacturability
* PVT and Monte Carlo characterization
* Electromigration (Totem, Voltus or equivalent)
* Power/IR drop analysis
* ESD practices and custom test setups
* Software/Tool Proficiency
* High-frequency test equipment (BERT, jitter analysers, VNA/PNA)
* Design capture/layout in Cadence Virtuoso
* Simulation in Spectre/APS/SpectreX, mixed-signal simulations in AMS
* Layout validation in Calibre/ICV/Pegasus
* Post-layout extraction in Quantus/StarRC, electromagnetic in EMX
* Matlab
* Track record of innovation; publications a plus
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