ASIC RTL Design Engineer
Cambridge (Hybrid – 3 days per week)
Our client is a leader in advanced semiconductor IP, delivering graphics, compute, and AI technologies across a broad range of devices.
Key Skills & Experience:
* Strong background in ASIC and/or FPGA design
* RTL design at SoC level
* Programming experience in C/C++ and Python
* Knowledge of GPU,CPU, DSP, or FPU architectures
If you’re a ASIC Hardware Engineer looking to take the next step in your career, apply today to
learn more.
For this and other UK-based opportunities, please get in touch with Jack Christodoulou.