Fast Forward in Cambridge is seeking a Design Verification Engineer to apply industry-standard practices to high-quality open source projects. The role emphasizes the verification of designs, including RISC-V cores. Candidates should have over 5 years of experience, particularly with SystemVerilog and UVM, and a solid understanding of the verification cycle. The company offers a competitive salary based on experience along with an extensive benefits package, including 25 days of annual leave, medical insurance, and a pension contribution. Discussions on hybrid working are welcome after probation.
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