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DFT Design Engineer - Memory Team, Market Drayton
Client: SAMSUNG
Location: Market Drayton, United Kingdom
Job Category: Other
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EU work permit required: Yes
Job Reference: cd4974caa4b4
Job Views: 6
Posted: 19.08.2025
Expiry Date: 03.10.2025
Job Description:
Position Summary
With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory, and Foundry. Our engineers work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/6G solutions, Neural processors, Serial Interfaces, Multimedia IPs, and more.
As one of the largest R&D centers outside Korea for Samsung Electronics, we pride ourselves on working with advanced technologies. Our engineers engage in diverse domains, projects, products, clients, and countries, conducting research in new and emerging technology areas. Innovation and creativity are highly valued, as we strive to deliver high reliability, high performance, and value-added services for world-class products.
Roles and Responsibilities
* Experience in Top/Block, FLAT/Hier DFT insertion flow methodologies.
* Execution of scan & MBIST insertion, ATPG, and verification at full chip level.
* Experience in timing closure in DFT modes, understanding shift, capture timing constraints, MBIST constraints, and their impacts.
* Generate, review, and validate DFT constraints to achieve timing closure of high-speed designs.
* Experience in timing closure in DFT modes, RTL analysis, logic synthesis, physical design, signoff verification (STA, Formality, Simulations). Exposure to analog and mixed-signal IP tests such as PLLs, MIPI, etc., and their pattern generation and verification. Exposure to post-silicon bring-up, diagnosis, and debug methods.
* Ability to understand architecture and limitations related to DFT, and to predict schedules, tasks, and personnel needs.
* Understanding of Power Estimation/Management for DFT modes is preferred.
* Mentor juniors, support training sessions, collaborate across teams and sites, and lead by example.
* Strong written and oral communication skills.
Experience: 5+ Years
Qualifications:
* B.Tech/B.E/M.Tech/M.E
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd, is committed to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of religion, gender, age, marital status, gender identity, veteran status, genetic information, disability, or any characteristic protected by law.
Skills and Qualifications
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