Job Description
Senior / Principal FPGA Engineer – Space Imaging
* Chelmsford, Essex (4 days p/w in office)
* £45,000 - £65,000 + excellent bens.
Space Imaging is expanding its portfolio of projects to develop Front End Electronics (FEE) systems for Space applications. The systems will include a CMOS detector, FEE, an FPGA (design code in VHDL), and a Microprocessor (MCU) as a complete system. The new systems require high quality FPGA Designs to operate in Space with high reliability for 5-year long missions or longer.
We are seeking a key individual working in a multi-disciplinary team. Doing so will require acquiring an intimate knowledge of how our current and new devices operate along with the practical ability to write FPGA code and drive new FPGA development for the next generation of FEE products for space. Existing FPGA designs are typically produced using VHDL using Microchip Libero and Xilinx Vivado.
Essential Experience: FPGA Engineer
* 3+ years industrial design of FPGA (Field Programmable Gate Arrays) in VHDL language.
* Use of Microchip Libero and/or Xilinx Vivado design environments.
* Functional verification using self-checking test benches and simulation.
* Timing verification using timing constraints and analysis.
* To generate accurate estimates and define tasks for FPGA product delivery.
* Authoring required documentation, including requirements specifications, detailed design documents, technical reports, test specifications, user manuals, work instructions, etc.
* Use of electronic test equipment (e.g. oscilloscopes, logic analyser)
* You will be responsible for end-to-end FPGA development, maintenance, and lifecycle to achieve project goals to the required level of quality. You will work closely with Embedded Software, Electronics and Systems Engineers to architect solutions to meet customer requirements.
Advantageous Skills &Experience: FPGA Engineer
* Previous experience in design for Spaceflight/Aerospace/Defense.
* Working knowledgeable of ECSS standards and development processes.
* High speed (Gigabit) transceiver interfaces.
* FPGA design techniques for high reliability and radiation environments.
* Requirement verification using UVVM test bench methodology.
* Working knowledge of SpaceWire and RMAP/CCSDS protocols.
* Image handling and processing.