THE ROLE
Join a global package reliability team that drives package and board-level reliability activities across AMD’s IC and graphics-card products that employ advanced flipchip and chiplet package constructions. The expanding Singapore Package Reliability Lab requires a candidate to perform component/board-level reliability stress testing of AMD’s leading-edge packages.
THE PERSON
A highly motivated Reliability Engineer with good project management skills which are crucial when collaborating with various teams across AMD. A strong and effective communicator, both verbal and written, which are essential when working with a global team. A proactive, outstanding teammate who focuses on teamwork, team building, and growing team success.
KEY RESPONSIBILITIES
* Execute package qualifications, reliability assessments, and engineering evaluations.
* Coordinate package qualification efforts for new products, designs, materials or processes and other logistic activities.
* Perform and assess electrical, mechanical, visual and acoustic microscopy results.
* Validate reliability test failures and conduct in-depth debug and root-cause identification.
* Develop open/short test program to support CPI (chip-package interaction) testing.
* Responsible for quality and timeliness of results for assigned tasks.
PREFERRED EXPERIENCE
* Knowledgeable in statistical analysis
* Experience with scripting languages (C, C++, Java, Ruby, Perl, Python)
* Proficient in Window, Unix, and Linux operating systems
ACADEMIC CREDENTIALS
* Bachelor’s or Master’s degree in related discipline preferred
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