Job Overview
This position is an excellent opportunity for an experienced and highly motivated verification engineer to join the growing System IP team! This is a fast-paced technical role employing the latest hardware design verification methodologies to develop complex and highly configurable hardware IP that sit at the heart of Arm-based Systems.
This role is for the Interconnect product team which develops the Arm Corelink Interconnect IP products. Our Interconnects and NoCs are designed for intelligent connected systems across a wide range of applications including mobile, IoT, networking infrastructure, automotive etc. The highly scalable IP is optimised for AMBA-compliant SoC connectivity and can be customised for multiple performance points.
Responsibilities
* You will specify and develop new hardware verification testbenches for future generation hardware IP.
* Improve existing testbenches to increase performance, quality and efficiency.
* Identify areas for improvement in methodologies and implement those changes to advance our best-practises for hardware verification.
* Reviewing and assessing proposed design changes from a verification complexity point of view.
* Ownership of verification environment from investigation all the way to verification closure.
* Investigating and scripting new verification flows and optimising existing ones.
* Analysis of data from simulation runs using machine learning and data science techniques to drive efficient bug discovery and coverage closure.
* There will be opportunities for improving our verification methodology collaborating with arm engineering teams.
* Mentoring members of the team.
Required Skills and Experience
* Minimum 6 years of experience verifying sophisticated designs using formal properties verification techniques.
* Experience in formal engines and tools (i.e. Cadence Jasper Gold).
* Experience in working with constrained-random verification including ownership of complex verification environment.
* Experience of using System Verilog.
* Software engineering skills including understanding of object-oriented programming, data structures, and algorithms.
* Skills in developing verification flows, making the best use of EDA tools and have good scripting skills and are able to plan and estimate your own work.
Preferred Skills and Experience
* UVM verification methodology.
* Team leadership and mentoring experience.
* Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (e.g., AMBA5 CHI, AMBA4 ACE or AXI).
* Strong communication and ability to work well as part of a team.
* Dedicated with a focused approach to problem analysis and solving.
Additional Information
Please note that no relocation package is available for this role.
If skilled worker sponsorship is required, Arm will meet costs associated with sponsorship for the employer only. All fees associated with the individual’s application e.g. visa application fee and Immigration Health Surcharge, will be the responsibility of the successful candidate.
Equal Opportunities at Arm
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
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