An exciting opportunity has arisen for a Senior Digital Design engineer to take the next step in their career.
The role involves taking full-flow ownership of all stages of the digital specification to RTL design flow, for complex ASIC blocks.
Key skills required include around 10 years' experience working in IC Development with a deep understanding of all aspects of ASIC front-end design, from specification to RTL, and with a basic understanding of RTL to tape out flow.
Key Responsibilities:
* RTL Design - VHDL or Verilog
* Functional verification – ideally a good knowledge of System Verilog and the use of techniques such as assertions and coverage driven verification.
* SoC knowledge – including the selection and integration of 3rd party IPs
* Experience in SoC interconnect protocols (AXI3, AXI4, AXI4-Lite, ACE, AXI5, AXI5)
* ASIC implementation skills (synthesis, DFT, timing closure)
To be considered for this role, you must have full UK working rights and be able to work onsite 3 days per week.
On offer will be share options and a bonus scheme alongside a base salary.
This is an excellent opportunity for a Senior Digital Design Engineer to further their career in a dynamic and innovative company.