Posted: 10 June
The role
Job overview This role involves leading technical decision-making, mentoring engineers at all levels, collaborating with cross-functional teams, and contributing to the development of formal verification methodologies. Your typical day would involve building cutting-edge formal verification testbench environments to find bugs and build proofs of bug absence in SoCs containing processors, video/GPUs, networking, AI/ML designs. Beyond the technical work, you will have line management responsibilities – where you would drive delivery and development of individuals in your team. Responsibilities: Drive formal verification strategy, defining methodologies and driving adoption across complex RTL designs. Architect and oversee scalable formal environments, including advanced assertion development and reusable frameworks. Drive deep formal analysis to achieve exhaustive coverage of critical design properties and corner cases. Own debug and root-cause analysis of complex failures, guiding resolution across cross-functional teams. Lead equivalence checking, verification planning, and coverage closure for high-impact projects. Mentor junior engineers and influence best practices, while improving verification flows, automation, and tool utilization. Requirements: Education Bachelors/Masters/Doctorate in EEE/ECE/CS/Maths/Physics Technical Skills: Linux/Unix Verilog/ SystemVerilog /VHDL Digital design Open-source projects in design/verification RISC-V/Arm/x86/MIPS SVA/PSL/Theorem proving Tcl/Python/Bash Soft Skills: Problem solving Ownership Autonomy Team spirit Attention to details Language skills: English Experience : 4-8 years of relevant design/verification experience 5-10 years of non-design/verification experience >2 years of FV experience Delivery experience: ability to autonomously execute middle scale projects (3 - 6 months) Right to work : We provide sponsorship for exceptional candidates, upon conditional terms and conditions. In Return: You’ll apply your formal verification expertise to technologies that shape and support millions of devices for years to come. This role gives you the opportunity to step into a field where you can grow your technical leadership and impact. About us Axiomise is the world’s only formal verification (FV) training, consulting, services and custom solutions company. The grand mission of Axiomise is to make the use of formal methods both accessible and predictable, such that every electronic chip on the planet (and there is almost one everywhere you see) can be proven to be bug-free using the power of formal verification. Mindset At Axiomise, our vision is to “make formal normal”. We achieve this by embracing within Axiomise a culture that thrives on A spiration, e X cellence, I nclusion, O neness and M astery. Join us in our shared passion to make formal normal. Equal opportunities at Axiomise Axiomise is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, colour, religion, sex, sexual orientation, gender identity, national origin, disability, or status.