A leading technology company in Cambridge is seeking a DDR Subsystem Architecture Engineer to ensure correct implementation of complex SoC architectures. The role involves debugging performance issues and working with design teams on specifications. Candidates should have a degree in Electrical or Computer Engineering, excellent communication skills, and at least 4 years of experience. A knowledge of RTL, SystemVerilog, and synthesis is key. This position provides the opportunity to influence architecture and impact high-profile products globally. #J-18808-Ljbffr