At Tata Technologies we make product development dreams a reality by designing, engineering and validating the products of tomorrow for the world’s leading manufacturers. Due to our continued growth we are now recruiting for a Triage Leadto be based at our office in Warwick.
Our Embedded Systems Solutions department (ESS) encompasses all activities outlined under the Automotive SPICE (ASPICE) process framework, including systems engineering, software engineering, coding, and all levels of functional testing. Beyond core development, ESS also integrates critical supporting processes such as project management, risk assessment, functional safety, and cybersecurity, ensuring compliance with ASPICE standards and delivering reliable, secure, and high-quality embedded systems & solutions.
The Role:
We are looking for a highly skilled High‑Voltage Battery Management System Engineer with extensive hands‑on experience in HIL testing, BMCM (Battery Measurement & Control Modules), and test execution triaging.This role is responsible for ensuring high‑quality validation of HV battery systems by performing system-level analysis, test triage, and early‑stage fault identification (L0/L1 analysis) across automated test environments.The ideal candidate is an industry‑experienced systems engineer who understands HV battery architectures, contact or logic, safety mechanisms, measurement chains, and HIL test bench operation.
Area of Responsibility
High Voltage (HV) System Testing
1. Interpret, review, and validate HV BMS system requirements across functional domains (cell monitoring, contactor control, diagnostic strategies, thermal management, SOC/SOH algorithms).
2. Translate system‑level requirements into testable scenarios and boundary conditions for HIL environments.
3. Support definition of test coverage, behaviors, and expected outputs for BMS safety and control functions.
4. Ensure the BMS operates safely under all test conditions and failure scenarios (OV/UV, OT/UT, OC/SC, insulation faults).
BMCM & HIL Rig Expertise
5. Voltage/current measurement channels, Fault insertion units
Cell emulators & pack simulation, Contactor & pre‑charge path emulation
HV & LV safety interlocks, Validate I/O correctness, scaling, timing, and synchronization between the HIL, BMCM, and ECU under test.
6. Troubleshoot HIL issues such as:
Incorrect sensor emulation, Measurement drift/noise, Timing issues in restbus simulation, Hardware faults or wiring problems
Design Verification Plan (DVP) Creation & Management
7. Author and own Design Verification Plans (DVPs) covering LV and HV BMS functionality, safety goals, and system requirements.
8. Build and maintain traceability matrices linking system requirements, safety requirements, and FMEA items to test cases and verification evidence.
9. Coordinate DVP reviews with systems, software, hardware, and safety engineering teams and drive milestone sign-off.
10. Revise DVPs continuously in response to design changes, software releases, and field-reported issues.
Issue Triaging & Defect Management
11. Identify, reproduce, and document defects in Jira with complete context: test environment, software build, hardware configuration, steps to reproduce, logs, scope, and severity classification.
12. Lead issue triage sessions — assess root cause, assign ownership, set priority, and track resolution across engineering teams.
13. Conduct re-verification testing on bug fixes and document closure evidence in Jira and test reports.
14. Coach team members on defect writing best practices, Jira workflows, and escalation procedures.
15. Generate Jira-based dashboards and metrics (open/closed by severity, defect aging, component heatmaps) for program leadership reviews.
16. Integrate Jira issue workflow with Agile sprint planning, backlog grooming, and release gates.
Reporting & Cross-Functional Collaboration
17. Produce clear test reports including test coverage metrics, pass/fail summaries, open issue status, and risk assessments.
18. Present V&V status, blocking issues, and risk mitigations at program reviews and engineering gate reviews.
Knowledge / Experience
·Bachelor's or Master's degree in Electrical Engineering, Electronics & Communication, Mechatronics, Automotive Engineering, or a closely related field.
·Hands-on HiL testing experience in an HV BMS systems in OEM, Tier‑1, or EV domain.
·HV architecture (modules, cells, pack topology), Contactor logic, pre‑charge, discharge path Isolation monitoring, protection circuits, Current/voltage/temp sensing principles
·HVIL, contactor control, pre-charge circuits, and grounding architecture.
·Skilled at debugging real-time simulation fidelity issues, timing overruns, and signal integrity problems.
·Strong hands‑on experience with HIL platforms (dSPACE, NI PXI, Vector VT, or BMCM rigs).
·Experience analyzing log files, signals, and BMS events during automated HIL test execution. Ability to triage complex failures and identify root causes quickly.
·Proficiency in reading and interpreting:
CAN, LIN communication, DBC, FIBEX, ARXML files, UDS diagnostic responses
·Experience leading triage meetings, assigning priorities, and managing defect backlogs to closure within program timelines.
In return for bringing your expertise to our business we offer a competitive salary along with excellent benefits including:
·Pension Scheme – We match employee contribution up to 5% of salary
·25 Days’ Holiday
·Private Health Care
·Tata Jaguar Land Rover Privilege Scheme - up to 20% off new JLR vehicles
·Group Income Protection
·Health Assured – Employee Assistance Program
·Group Life Assurance
·Health Shield – Private Health Cash Plan
If you are passionate about bringing innovation to the projects you work on and want to join a global company, then this is the place for you.
Tata Technologies: Engineering a better world.
Tata Technologies would like to thank all applicants for their interest, each application will be reviewed against the set criteria for the role. We would like to advise that only candidates under consideration will be contacted. If you do not hear from us within 10 working days following the closing date it will mean that unfortunately your application has not been successful. We will however retain your details for any suitable future opportunities.