We are seeking a highly skilled and experienced Staff Research Scientist with strong ISA extensions experience. This is a high:level research and development role.
Key Responsibilities:
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Analyse dynamic language overhead: Profile V8 and ArkTS interpreter/JIT to identify operations that consume disproportionate cycles (type checks, inline cache misses, garbage collection barriers, dynamic dispatch, deoptimisation)
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Design ISA extensions: Propose new instructions or architectural features that accelerate common dynamic language patterns while maintaining backward compatibility and security boundaries
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Prototype in software: Modify V8, ArkTS interpreter, or JIT compiler to use new instructions, measuring speedup on representative workloads (OpenHarmony apps, JavaScript benchmarks, browser workloads)
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Model in architectural simulators: Implement proposed extensions in GEM5
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Collaborate on RTL implementation: Work with digital design teams to refine instruction encoding, pipeline integration, and verification requirements
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Publish and patent: Document novel contributions through internal technical reports, conference papers, and patent applications
Required:
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Deep understanding of CPU microarchitecture: pipelines, out:of:order execution, branch prediction, memory hierarchy, ISA design principles
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Experience with architectural simulation (GEM5, Sniper, ZSim, or proprietary tools)
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Familiarity with interpreter or JIT compiler internals-any of: V8, SpiderMonkey, JavaScriptCore, HotSpot, ART, LuaJIT, PyPy, or similar
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Strong C/C++ and systems programming skills
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Comfortable working in Linux environments with Git, Make, scripting
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Equivalent industry experience (5+ years in CPU architecture, compilers, or language runtimes) welcomed
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PhD or MSc in Computer Science, Computer Engineering, or Electrical Engineering preferred