A leading aerospace manufacturer in Irvine is seeking a Sr. ASIC Design Engineer to develop next-generation FPGAs and ASICs for space and ground systems. Your role involves evaluating architectural trade-offs, defining micro-architecture, and collaborating with verification teams. Ideal candidates will have at least 5 years of experience in RTL implementation and a relevant degree. Competitive compensation between $160,000 – $220,000 per year, with comprehensive benefits included. #J-18808-Ljbffr