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Vhdl design engineer

Guildford
Surrey Satellite Technology Ltd (SSTL)
Design engineer
Posted: 20 October
Offer description

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Key Purpose Of Job

The design engineer will design, implement, and verify FPGA designs using VHDL.


Key Tasks

* Design, develop, and simulate FPGA designs in VHDL
* Take mission requirements and translate down to FPGA implementation
* Perform simulation, synthesis and timing analysis to verify functionality and performance
* Create testbenches for functional verification
* Generation of appropriate design documentation
* Work closely in a core project team.
* Responsible for the delivery of all aspects of the defined/delegated package of work which includes, Technical Solution, Budget and Schedule.


Experience

* Several years experience of FPGA design.
* Experience of system level debug and test


Knowledge & Skills

* Knowledge of FPGA design in VHDL
* Knowledge of Lab Test Equipment
* Excellent communication skills
* Commitment to deliver to challenging schedules
* Good inter-personal skills
* Organised approach
* Good planning skills


Additional responsibilities

* Involvement in SSTL peer reviews

Department Electrical Engineering Role VHDL Design Engineer Locations Guildford Employment type Full-time Job Reference 2105

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