We have had an exciting opportunity become available for Digital Verification engineers in Cambridge.
A high number of candidates may make applications for this position, so make sure to send your CV and application through as soon as possible.
Imagine the innovations we could achieve if production-ready, commercial-grade IP and engineering systems were freely available.
Open-source development has the potential to transform the semiconductor industry.
Our Ibex CPU and OpenTitan Root of Trust projects have reached production silicon, working with world-leading partners including Google and combining open-source principles with best-practice chip design methodologies.
The Role You will apply industrial-strength design verification to high-quality open-source designs, helping raise verification standards to the highest commercial level.
Your work will span block- and system-level verification across designs including OpenTitan, RISC-V cores, cryptographic CPUs (OTBN), crypto accelerators, and peripherals such as USB, I2C, and SPI.
Responsibilities Design, implement, and debug SystemVerilog/UVM testbenches Develop verification plans, tests, and coverage Review open-source contributions and debug regressions Contribute to test and CI infrastructure Collaborate with partners to support successful tapeouts Requirements Essential 5 years industry experience xjlbheb in design verification Strong SystemVerilog and UVM experience Full verification lifecycle experience through tapeout C and/or Python for tests and automation Git/GitHub and collaborative team experience Desirable Formal verification (e.g.
Jasper) RISC-V or ISA experience Security verification knowledge Silicon bring-up or post-silicon debug Technical leadership experience