Job Details
Enhanced parental leave: offers up to 26 weeks for maternity, adoption and shared parental leave. Enhancements are available for paternity leave, neonatal leave and fertility testing and treatments.
Facilities: Fantastic site facilities including subsidised meals, free car parking and much more.
Opportunity
Our FPGA Design team is rapidly growing! We are seeking a number of talented FPGA Design Engineers to work on a wide range of projects, including advanced signal processing systems (image/radio), core embedded processing systems and safety and security critical systems. Your role will involve all phases of the FPGA design life cycle, from requirement inception through to a validated design. This will offer you a great opportunity to strongly influence the design, push the use of latest technologies and interact with the wider multi‑discipline design teams; whilst also leveraging the latest tools and technologies provided by top FPGA vendors.
Responsibilities
Produce complex FPGA architectures and design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel and Microsemi devices. Verify FPGA implementations using VHDL and System Verilog/UVM test‑bench methodologies. Proficient in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generate low‑level software (C) for FPGA test and integration with embedded systems. Configure and document designs to a high professional standard.
Requirements
* Educated to degree level (or equivalent qualification).
* Experience in generating FPGA architectures and design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel and Microsemi devices.
* Experience in verifying FPGA implementations using VHDL and System Verilog/UVM test‑bench methodologies.
* Proficiency in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim).
* Strong skills in generating low‑level C software for FPGA test and integration with embedded systems.
* Ability to configure and document designs to a high professional standard.
Security Clearance
Some roles require an elevated level of security clearance and may require DV (Developed Vetting). Security clearance requirement: British Citizen or a Dual UK national with British citizenship. All successful candidates will need to undergo HMG Basic Personnel Security Standard checks (BPSS) after offer.
Offer & Benefits
* Company bonus: up to 21% of base salary.
* Pension: maximum total (employer and employee) contribution of up to 14%.
* Flexible working: 4‑5 days per week on site, due to workload classification. We are also open to compressed hours or part‑time working.
* Potential relocation package for Stevenage, Bristol and Bolton roles.
* Dynamic hybrid working arrangements.
Additional Benefits & Extras
* Free car parking and subsidised meals.
* Employee networks: Gender Equality, Pride, Menopause Matters, Parents and Carers, Armed Forces, Ethnic Diversity, Neurodiversity, Disability.
* Supportive recruitment process with adjustments and advice available.
Salary & Locations
Job Title: FPGA Designer. Salary: up to circa £75,000 depending on experience. Locations: Stevenage, Bristol and Bolton (potential relocation package).
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